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The delay of the Tesla AI5 chip is helping Nvidia’s DRIVE Thor capture market share in high-performance car computing. Tesla’s AI5 chip, which will replace the current AI4 hardware, is now slated for mass production in mid-2027, according to recent remarks by Elon Musk.
This setback impacts Tesla’s planned fleet expansion, which was projected to reach 4.5 million vehicles in 2027. Conversely, Nvidia’s Thor chip, which offers up to 2,000 TOPS of AI performance, has already been selected by multiple major automakers. This competitive shift means more non-Tesla vehicles may achieve Level 4 autonomy sooner.

Following the competitive shift mentioned above, Nvidia’s DRIVE Thor is designed as a centralized “superchip” to manage all in-car functions from one unit. The chip integrates both the automated driving system and cockpit features, such as the infotainment screen and digital gauge cluster.
This integration saves automakers high costs and space. NVIDIA says DRIVE Thor delivers approximately 2,000 AI teraflops (FP-precision) and is expected to begin appearing in 2025-model vehicles, with the DRIVE AGX Thor dev platform targeting general availability in Q4 2025.

While many partners turn to Nvidia, the delay of the AI5 chip means Tesla’s new Cybercab robotaxi will utilize the older AI4 hardware for its initial launch. Musk has targeted April 2026 for initial Cybercab production, pending approval.
Using the AI4 chip, which has a peak AI processing capacity of 150 TOPS, means the Cybercab will launch with less computational power than initially planned. The company anticipates that the first 50,000 Cybercabs will be built with the AI4 system before transitioning to AI5, which is expected to occur after the third quarter of 2027.

To compete with Tesla’s future hardware, the Nvidia Thor architecture provides a significant advantage in raw processing power compared to current systems. The chip incorporates 14 ARM Neoverse V3AE CPU cores, which are high-performance server-grade processors. It uses the advanced Blackwell Tensor Cores for AI tasks.
The high-end specification of the Thor platform supports up to 128 GB of LPDDR5X RAM and utilizes a single chip for dual redundancy. This allows for a safety integrity level of ASIL D, the highest rating in the automotive industry, ensuring maximum safety for autonomous functions starting with 2026 models.

Despite the delay, Tesla is adopting a dual-foundry manufacturing strategy for the AI5 chip to diversify its supply chain. The chips will be fabricated by both TSMC and Samsung, reducing reliance on a single producer. TSMC is set to utilize its advanced 3nm N3E process at its Arizona facility, with high-volume runs projected to begin on September 1, 2027.
Samsung is expected to use a cutting-edge 2nm process for a portion of the AI5 supply. This dual sourcing is expected to allow Tesla to ramp up production to over 3 million AI5 chips annually once both foundries are fully operational.

Complementing Nvidia’s hardware advantages, the global adoption of the DRIVE Thor is accelerating among key competitors, putting pressure on Tesla’s market dominance. Major automakers are using Thor to power their next-generation fleets.
Chinese EV giant BYD has committed to using the Thor platform for its entire line of luxury models starting in the 2026 model year. Volvo and Lucid are also integrating Thor for enhanced safety and cockpit features.
The platform’s ability to handle 14 different camera feeds simultaneously is a key factor in its high adoption rate, offering a robust sensor fusion capability for Level 4 driving.

To achieve greater efficiency following its production challenges, Tesla removed specific traditional components from the AI5 design. The legacy GPU and the dedicated Image Signal Processor (ISP) were removed from the AI5 architecture, unlike their presence in the AI4 chip.
This “radical simplicity” enabled the chip to fit within a half-reticle design, thereby improving manufacturing efficiency. The AI5 chip is expected to achieve an industry-leading energy efficiency of around 15 TOPS/W (Tera Operations Per Second per Watt) for inference tasks.

Crucial for power-sensitive applications, such as robotics, one primary goal of the AI5 design is to drastically reduce power consumption. Elon Musk stated on November 17, 2025, that the new AI5 chip consumes only 250W of power.
This low energy draw is approximately one-fourth the energy consumption of a high-end competitor’s chip, such as the Nvidia B200. Furthermore, the specialized design allows Tesla to claim that the AI5 costs only one-tenth the price of competitor chips while delivering equivalent autonomous driving performance.

In contrast to Tesla’s focus, Nvidia’s DRIVE Thor is not limited to passenger cars but is also making significant inroads into Level 4 commercial vehicle and logistics platforms. Companies like Aurora and Volvo Autonomous Solutions are integrating Thor to power their next-generation driverless trucks.
The integration with Aurora Driver, an SAE Level 4 autonomous system, is slated for mass manufacturing by supplier Continental in 2027. Furthermore, the highly scalable Jetson Thor platform, derived from the automotive chip, is being used for advanced AI applications in robotics, extending Nvidia’s presence into the physical edge computing domain.

The success of Thor is further driven by leading global automotive Tier-1 suppliers who are integrating the chip into their electronic control unit (ECU) architectures, creating a standardized base for many automakers.
Bosch has initiated a strategic integration of the Thor platform into its upcoming compute and ECU designs, aiming to help automakers efficiently deploy advanced AI systems.
Another major supplier, Magna, is collaborating with Nvidia to integrate the DRIVE AGX platform, based on Thor, into its L2+ through L4 active safety solutions. Magna plans to unveil a working demonstration of a Thor-powered platform in Q4 2025, accelerating its market availability.

To meet the demands of advanced software, the AI5 chip will feature a massive increase in on-chip memory and memory bandwidth to handle the computational needs of larger, next-generation AI models. The chip boasts a substantial 144 GB of built-in memory, which is 9 times more memory than the previous AI4 system, which typically came with 16 GB.
Moreover, the memory bandwidth is expected to be 5 times improved over the AI4 chip, enhancing data transfer speed. This dramatic increase is designed to address hardware bottlenecks and fully support the new version 14 of Tesla’s Full Self-Driving software.
Want to see how Tesla is securing the next wave of computing power for self-driving? Read more in Tesla chooses Samsung for 16.5 billion AI chip project.

Tesla’s commitment to the AI5 chip, despite the delay, is rooted in a strong financial and performance rationale compared to general-purpose chips. CEO Elon Musk stated that the AI5 will offer the “best performance per dollar for AI, maybe by a factor of 10” compared to rival chips.
This is primarily achieved by optimizing the chip solely for Tesla’s specific software stack. Analysts suggest that this internal approach can reduce per-unit costs by up to 30%. The proprietary vertical integration strategy, leveraging AI5 for inference and Nvidia GPUs for training, minimizes high-volume dependency on third-party silicon.
Interested in Elon Musk’s plan to build a massive chip factory to avoid supply limits—a move Nvidia warns could be risky? Learn more in Elon Musk plans Tesla TeraFab to ease chip shortage, and Nvidia calls it risky.
Will this delay give Nvidia the edge in car computing? Share your thoughts below.
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